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The tradeoff is complexity. The microcode must be carefully arranged so that the instructions in delay slots are either useful setup for both paths, or at least harmless if the redirect fires. Not every case is as clean as RETF. When a PLA redirect interrupts an LCALL, the return address is already pushed onto the microcode call stack (yes, the 386 has a microcode call stack) -- the redirected code must account for this stale entry. When multiple protection tests overlap, or when a redirect fires during a delay slot of another jump, the control flow becomes hard to reason about. During the FPGA core implementation, protection delay slot interactions were consistently the most difficult bugs to track down.
。关于这个话题，搜狗输入法2026提供了深入分析
* 进阶：使用Sedgewick步长序列（更高效）
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42. 6家外资齐声唱多中国资产：A股步入“慢牛”新阶段驱动逻辑转向盈利增长 - 东方财富网, wap.eastmoney.com/a/202602253…